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Operational Amplifier Speed and Accuracy Improvement proposes a new methodology for the design of analog integrated circuits. The usefulness of this methodology is demonstrated through the design of an operational amplifier. This methodology consists of the following iterative steps: description of the circuit functionality at a high level of abstraction using signal flow graphs; equivalent transformations and modifications of the graph to the form where all important parameters are controlled by dedicated feedback loops; and implementation of the structure using a library of elementary cells. Operational Amplifier Speed and Accuracy Improvement shows how to choose structures and design circuits which improve an operational amplifier's important parameters such as speed to power ratio, open loop gain, common-mode voltage rejection ratio, and power supply rejection ratio. The same approach is used to design clamps and limiting circuits which improve the performance of the amplifier outside of its linear operating region, such as slew rate enhancement, output short circuit current limitation, and input overload recovery.
Operational Amplifier Speed and Accuracy Improvement proposes a new methodology for the design of analog integrated circuits. The usefulness of this methodology is demonstrated through the design of an operational amplifier. This methodology consists of the following iterative steps: description of the circuit functionality at a high level of abstraction using signal flow graphs; equivalent transformations and modifications of the graph to the form where all important parameters are controlled by dedicated feedback loops; and implementation of the structure using a library of elementary cells. Operational Amplifier Speed and Accuracy Improvement shows how to choose structures and design circuits which improve an operational amplifier's important parameters such as speed to power ratio, open loop gain, common-mode voltage rejection ratio, and power supply rejection ratio. The same approach is used to design clamps and limiting circuits which improve the performance of the amplifier outside of its linear operating region, such as slew rate enhancement, output short circuit current limitation, and input overload recovery.
Inhaltsverzeichnis
Preface. Notations.
1: Introduction. 1.1. Organization of the book. 1.2. Analog design steps and tools. 1.3. Modern analog processes. 1.4. Trends and requirements of the OpAmp design. 1.5. Essential parameters of bipolar and MOS transistors.
2: Structural design methodology. 2.1. Consider good circuits only. 2.2. System description and analysis with signal flow graphs. 2.3. Frequency stability in the multiloop system. 2.4. Elementary building cells. 2.5. Summary.
3: Biasing. 3.1. PTAT biasing circuits. 3.2. MOS gm-matching biasing. 3.3. Negative-TC and zero-TC current generators. 3.4. Current mirrors and sources. 3.5. Subregulated biasing. 3.6. Low-noise bootstrap charge pump. 3.7. Start-up circuits.
4: OpAmp gain structure, frequency compensation and stability. 4.1. Voltage and current gain boost. 4.2. Frequency compensation. 4.3. Rail-to-rail IO OpAmp structure.
5: Input stage. 5.1. Rail-to-rail input stages with stable gm. 5.2. CMRR/PSRR improvement. 5.3. Trimming techniques. 5.4. Offset and temperature drift trimming. 5.5. Input protection.
6: Intermediate amplification stages. 6.1. Floating current source. 6.2. Current mirrors of the folded cascode. 6.3. Direct voltage gain boost in folded cascode. 6.4. Voltage gain boost utilizing current mirrors. 6.5. Voltage follower.
7: Class AB output stage. 7.1. Class AB stage structure. 7.2. Generation andimprovement of class AB circuits.
8: Special functions. 8.1. Startup and shutdown. 8.2. Temperature shutdown. 8.3. Output current limiting. 8.4. Slew rate enhancement. 8.5. Overload recovery.
9: From structure to circuit. 9.1. General considerations of transistor sizing and biasing. 9.2. Design step one: input and output devices and currents. 9.3. Folded cascode. 9.4. Class AB output stage. 9.5. Gain boost and folded cascode current source. 9.6. Biasing. 9.7. Finale of the amplifier design.
Appendix: Structural properties and linear transformations in the multidimensional systems with symmetric links.
References. Index.
1: Introduction. 1.1. Organization of the book. 1.2. Analog design steps and tools. 1.3. Modern analog processes. 1.4. Trends and requirements of the OpAmp design. 1.5. Essential parameters of bipolar and MOS transistors.
2: Structural design methodology. 2.1. Consider good circuits only. 2.2. System description and analysis with signal flow graphs. 2.3. Frequency stability in the multiloop system. 2.4. Elementary building cells. 2.5. Summary.
3: Biasing. 3.1. PTAT biasing circuits. 3.2. MOS gm-matching biasing. 3.3. Negative-TC and zero-TC current generators. 3.4. Current mirrors and sources. 3.5. Subregulated biasing. 3.6. Low-noise bootstrap charge pump. 3.7. Start-up circuits.
4: OpAmp gain structure, frequency compensation and stability. 4.1. Voltage and current gain boost. 4.2. Frequency compensation. 4.3. Rail-to-rail IO OpAmp structure.
5: Input stage. 5.1. Rail-to-rail input stages with stable gm. 5.2. CMRR/PSRR improvement. 5.3. Trimming techniques. 5.4. Offset and temperature drift trimming. 5.5. Input protection.
6: Intermediate amplification stages. 6.1. Floating current source. 6.2. Current mirrors of the folded cascode. 6.3. Direct voltage gain boost in folded cascode. 6.4. Voltage gain boost utilizing current mirrors. 6.5. Voltage follower.
7: Class AB output stage. 7.1. Class AB stage structure. 7.2. Generation andimprovement of class AB circuits.
8: Special functions. 8.1. Startup and shutdown. 8.2. Temperature shutdown. 8.3. Output current limiting. 8.4. Slew rate enhancement. 8.5. Overload recovery.
9: From structure to circuit. 9.1. General considerations of transistor sizing and biasing. 9.2. Design step one: input and output devices and currents. 9.3. Folded cascode. 9.4. Class AB output stage. 9.5. Gain boost and folded cascode current source. 9.6. Biasing. 9.7. Finale of the amplifier design.
Appendix: Structural properties and linear transformations in the multidimensional systems with symmetric links.
References. Index.
Details
Erscheinungsjahr: | 2010 |
---|---|
Fachbereich: | Nachrichtentechnik |
Genre: | Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Reihe: | The Springer International Series in Engineering and Computer Science |
Inhalt: |
xiv
194 S. 6 s/w Illustr. |
ISBN-13: | 9781441954374 |
ISBN-10: | 1441954376 |
Sprache: | Englisch |
Ausstattung / Beilage: | Paperback |
Einband: | Kartoniert / Broschiert |
Autor: |
Filanovsky, Igor M.
Ivanov, Vadim V. |
Auflage: | Softcover reprint of the original 1st ed. 2004 |
Hersteller: |
Springer US
Springer US, New York, N.Y. The Springer International Series in Engineering and Computer Science |
Maße: | 235 x 155 x 12 mm |
Von/Mit: | Igor M. Filanovsky (u. a.) |
Erscheinungsdatum: | 10.12.2010 |
Gewicht: | 0,33 kg |
Inhaltsverzeichnis
Preface. Notations.
1: Introduction. 1.1. Organization of the book. 1.2. Analog design steps and tools. 1.3. Modern analog processes. 1.4. Trends and requirements of the OpAmp design. 1.5. Essential parameters of bipolar and MOS transistors.
2: Structural design methodology. 2.1. Consider good circuits only. 2.2. System description and analysis with signal flow graphs. 2.3. Frequency stability in the multiloop system. 2.4. Elementary building cells. 2.5. Summary.
3: Biasing. 3.1. PTAT biasing circuits. 3.2. MOS gm-matching biasing. 3.3. Negative-TC and zero-TC current generators. 3.4. Current mirrors and sources. 3.5. Subregulated biasing. 3.6. Low-noise bootstrap charge pump. 3.7. Start-up circuits.
4: OpAmp gain structure, frequency compensation and stability. 4.1. Voltage and current gain boost. 4.2. Frequency compensation. 4.3. Rail-to-rail IO OpAmp structure.
5: Input stage. 5.1. Rail-to-rail input stages with stable gm. 5.2. CMRR/PSRR improvement. 5.3. Trimming techniques. 5.4. Offset and temperature drift trimming. 5.5. Input protection.
6: Intermediate amplification stages. 6.1. Floating current source. 6.2. Current mirrors of the folded cascode. 6.3. Direct voltage gain boost in folded cascode. 6.4. Voltage gain boost utilizing current mirrors. 6.5. Voltage follower.
7: Class AB output stage. 7.1. Class AB stage structure. 7.2. Generation andimprovement of class AB circuits.
8: Special functions. 8.1. Startup and shutdown. 8.2. Temperature shutdown. 8.3. Output current limiting. 8.4. Slew rate enhancement. 8.5. Overload recovery.
9: From structure to circuit. 9.1. General considerations of transistor sizing and biasing. 9.2. Design step one: input and output devices and currents. 9.3. Folded cascode. 9.4. Class AB output stage. 9.5. Gain boost and folded cascode current source. 9.6. Biasing. 9.7. Finale of the amplifier design.
Appendix: Structural properties and linear transformations in the multidimensional systems with symmetric links.
References. Index.
1: Introduction. 1.1. Organization of the book. 1.2. Analog design steps and tools. 1.3. Modern analog processes. 1.4. Trends and requirements of the OpAmp design. 1.5. Essential parameters of bipolar and MOS transistors.
2: Structural design methodology. 2.1. Consider good circuits only. 2.2. System description and analysis with signal flow graphs. 2.3. Frequency stability in the multiloop system. 2.4. Elementary building cells. 2.5. Summary.
3: Biasing. 3.1. PTAT biasing circuits. 3.2. MOS gm-matching biasing. 3.3. Negative-TC and zero-TC current generators. 3.4. Current mirrors and sources. 3.5. Subregulated biasing. 3.6. Low-noise bootstrap charge pump. 3.7. Start-up circuits.
4: OpAmp gain structure, frequency compensation and stability. 4.1. Voltage and current gain boost. 4.2. Frequency compensation. 4.3. Rail-to-rail IO OpAmp structure.
5: Input stage. 5.1. Rail-to-rail input stages with stable gm. 5.2. CMRR/PSRR improvement. 5.3. Trimming techniques. 5.4. Offset and temperature drift trimming. 5.5. Input protection.
6: Intermediate amplification stages. 6.1. Floating current source. 6.2. Current mirrors of the folded cascode. 6.3. Direct voltage gain boost in folded cascode. 6.4. Voltage gain boost utilizing current mirrors. 6.5. Voltage follower.
7: Class AB output stage. 7.1. Class AB stage structure. 7.2. Generation andimprovement of class AB circuits.
8: Special functions. 8.1. Startup and shutdown. 8.2. Temperature shutdown. 8.3. Output current limiting. 8.4. Slew rate enhancement. 8.5. Overload recovery.
9: From structure to circuit. 9.1. General considerations of transistor sizing and biasing. 9.2. Design step one: input and output devices and currents. 9.3. Folded cascode. 9.4. Class AB output stage. 9.5. Gain boost and folded cascode current source. 9.6. Biasing. 9.7. Finale of the amplifier design.
Appendix: Structural properties and linear transformations in the multidimensional systems with symmetric links.
References. Index.
Details
Erscheinungsjahr: | 2010 |
---|---|
Fachbereich: | Nachrichtentechnik |
Genre: | Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Reihe: | The Springer International Series in Engineering and Computer Science |
Inhalt: |
xiv
194 S. 6 s/w Illustr. |
ISBN-13: | 9781441954374 |
ISBN-10: | 1441954376 |
Sprache: | Englisch |
Ausstattung / Beilage: | Paperback |
Einband: | Kartoniert / Broschiert |
Autor: |
Filanovsky, Igor M.
Ivanov, Vadim V. |
Auflage: | Softcover reprint of the original 1st ed. 2004 |
Hersteller: |
Springer US
Springer US, New York, N.Y. The Springer International Series in Engineering and Computer Science |
Maße: | 235 x 155 x 12 mm |
Von/Mit: | Igor M. Filanovsky (u. a.) |
Erscheinungsdatum: | 10.12.2010 |
Gewicht: | 0,33 kg |
Warnhinweis