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Ever increasing silicon design complexity and transistor density, product differentiation and time to market are major factors creating huge pressure on complete design flow. This book covers Verification phase by describing the concepts of Universal Verification Methodology (UVM) and by presenting a pragmatic approach of developing efficient and unified advanced verification environment at all levels using Universal Verification Methodology along with Assertion based verification, hardware acceleration and Transaction Level Modeling. This book is written primarily for verification engineers performing verification of complex IP blocks or entire system-on-chip (SoC) designs. However, much of material will also be of interest to SoC project managers as well as designers to learn more about verification. Furthermore, this book includes detailed information about verification environment for one case which can be easily used as reference for other cases.
Ever increasing silicon design complexity and transistor density, product differentiation and time to market are major factors creating huge pressure on complete design flow. This book covers Verification phase by describing the concepts of Universal Verification Methodology (UVM) and by presenting a pragmatic approach of developing efficient and unified advanced verification environment at all levels using Universal Verification Methodology along with Assertion based verification, hardware acceleration and Transaction Level Modeling. This book is written primarily for verification engineers performing verification of complex IP blocks or entire system-on-chip (SoC) designs. However, much of material will also be of interest to SoC project managers as well as designers to learn more about verification. Furthermore, this book includes detailed information about verification environment for one case which can be easily used as reference for other cases.
Über den Autor
Abhishek Jain, Technical Manager at STMicroelectronics, India, has done [...] in Computer Science from IETE, [...]. Electronics from University of Delhi and PGDBA in Operations Management from Symbiosis. Driving key activities on Functional Verification Flow in Imaging group of [...] Research in Efficient Verification Management.
Details
Erscheinungsjahr: | 2014 |
---|---|
Genre: | Informatik, Mathematik, Medizin, Naturwissenschaften, Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Inhalt: | 140 S. |
ISBN-13: | 9783659476044 |
ISBN-10: | 3659476048 |
Sprache: | Englisch |
Ausstattung / Beilage: | Paperback |
Einband: | Kartoniert / Broschiert |
Autor: | Jain, Abhishek |
Hersteller: | LAP LAMBERT Academic Publishing |
Verantwortliche Person für die EU: | OmniScriptum GmbH & Co. KG, Bahnhofstr. 28, D-66111 Saarbrücken, info@akademikerverlag.de |
Maße: | 220 x 150 x 9 mm |
Von/Mit: | Abhishek Jain |
Erscheinungsdatum: | 19.01.2014 |
Gewicht: | 0,227 kg |
Über den Autor
Abhishek Jain, Technical Manager at STMicroelectronics, India, has done [...] in Computer Science from IETE, [...]. Electronics from University of Delhi and PGDBA in Operations Management from Symbiosis. Driving key activities on Functional Verification Flow in Imaging group of [...] Research in Efficient Verification Management.
Details
Erscheinungsjahr: | 2014 |
---|---|
Genre: | Informatik, Mathematik, Medizin, Naturwissenschaften, Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Inhalt: | 140 S. |
ISBN-13: | 9783659476044 |
ISBN-10: | 3659476048 |
Sprache: | Englisch |
Ausstattung / Beilage: | Paperback |
Einband: | Kartoniert / Broschiert |
Autor: | Jain, Abhishek |
Hersteller: | LAP LAMBERT Academic Publishing |
Verantwortliche Person für die EU: | OmniScriptum GmbH & Co. KG, Bahnhofstr. 28, D-66111 Saarbrücken, info@akademikerverlag.de |
Maße: | 220 x 150 x 9 mm |
Von/Mit: | Abhishek Jain |
Erscheinungsdatum: | 19.01.2014 |
Gewicht: | 0,227 kg |
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