PREFACE xi

ACKNOWLEDGMENTS xlii

LIST OF TABLES xv

LIST OF FIGURES xvii

SUMMARY xxi

1 THE BASICS 1

1.1 The Diode 4

1.1.1 Breakdown Region 6

1.1.2 Forward-Biased Region 7

1.2 Current Mirrors 8

1.2.1 The Simple Mirror 10

1.2.2 Cascode Mirrors 11

1.2.3 Regulated Cascode Mirrors 13

1.3 Summary 16

Appendix A.I Temperature Dependence of the Diode Voltage 16

Bibliography 20

2 CURRENT REFERENCES 23

2.1 PTAT Current References 24

2.1.1 Bipolar Implementations 24

2.1.2 CMOS Implementations 26

2.2 Startup Circuits and Frequency Compensation 29

2.2.1 Continuous-Conduction Startup Circuits 29

2.2.2 State-Dependent Startup Circuits 30

2.2.3 Frequency Compensation 33

2.3 CTAT Current References 34

2.4 Temperature-Independent Current References 35

2.5 PTAT2 Current Generators 36

2.5.1 Bipolar Implementations 36

2.5.2 CMOS Implementations 37

2.6 Summary 42

Bibliography 43

3 VOLTAGE REFERENCES 45

3.1 Zero-Order References 46

3.1.1 Forward-Biased Diode References 46

3.1.2 Zener References 50

3.2 First-Order References 50

3.2.1 Forward-Biased Diode References 50

3.2.2 Zener References 53

3.3 Second-Order References (Curvature Correction) 57

3.4 State-of-the-Art Curvature-Correction Techniques 61

3.4.1 Temperature-Dependent Resistor Ratio 61

3.4.2 Diode Loop 62

3.4.3 j8 Compensation 64

3.4.4 Piecewise-Linear Current-Mode Technique 65

3.4.5 Matched-Nonlinear Correction 67

3.4.6 Exact Method 71

3.5 Summary 76

Bibliography 77

4 DESIGNING PRECISION REFERENCE CIRCUITS 79

4.1 Error Sources 80

4.1.1 Qualitative Effects 81

4.2 The Output Stage 87

4.2.1 Voltage-Mode 88

4.2.2 Current-Mode 89

4.2.3 Mixed-Mode 90

4.2.4 Regulated versus Unregulated References 91

4.3 Designing for Power Supply Rejection and Line Regulation 99

4.3.1 Cascodes 99

4.3.2 Pseudo-Power Supply 101

4.4 Summary 108

Appendix A.4 Error Sources in a Typical First-Order Bandgap 108

Appendix B.4 Effect of the Resistors' Temperature Coefficient on a Reference with a Current-Mode Output Stage 116

Bibliography 118

5 CONSIDERING THE SYSTEM AND THE WORKING ENVIRONMENT 119

5.1 Design of the Trim Network 120

5.1.1 Trim Range 121

5.1.2 Trimming Techniques 124

5.2 Package-Shift Effects 130

5.3 System-Related Issues 134

5.3.1 Circuit Implications 134

5.3.2 Layout Implications 135

5.4 Characterization 138

5.5 Summary 142

Appendix A.5 Bandgap Trimming Procedure for a Mixed-Mode (Both Voltage-Mode and Current-Mode) Output Stage 143

Appendix B.5 Package Shift-Effects in Bandgap Reference Circuits 148

Appendix C.5 Derivation of the Time Required for a Reference Circuit to Change a Finite Amount upon a Single-Step Stimulus 153

Bibliography 155

INDEX 157

ABOUT THE AUTHOR 167